How to Measure RTOS Performance
RTOS Metrics – Interrupt Latency
The time related performance measurements are probably of most concern to developers using an RTOS.
A key characteristic of a real time system is its timely response to external events. An embedded system is typically notified of an event by means of an interrupt, so the delay between the interrupt occurring and the response to that interrupt – the interrupt latency – is critical.
Unfortunately, there are two definitions, at least, of the term “interrupt latency”:
System: the total delay between the interrupt signal being asserted and the start of the interrupt service routine execution.
OS: the time between the CPU interrupt sequence starting and the initiation of the ISR. This is really the operating system overhead, but many people refer to it as the latency. This means that some vendors claim zero interrupt latency
The two definitions are illustrated in diagram 1.
Interrupt response is the sum of two distinct times:
ƮIL = ƮH + ƮOS
ƮH is the hardware dependent time, which depends on the interrupt controller on the board as well as the type of the interrupt
ƮOS is the OS induced overhead
Ideally, quoted figures should include the best and worst case scenarios. The worst case is when the kernel disables interrupts.
To measure a time interval, like interrupt latency, with any accuracy, requires a suitable instrument. The best tool to use is an oscilloscope. One approach is to use one pin on a GPIO interface to generate the interrupt. This pin can be monitored on the ‘scope. At the start of the interrupt service routine, another pin, which is also being monitored, is toggled. The interval between the two signals may be easily read from the instrument.
Many embedded systems are real time and it is those applications, along with fault tolerant systems, where knowledge of interrupt latency is important.
If the requirement is to maximize bandwidth on a particular interface, the latency on that specific interrupt needs to be measured.
To give an idea of numbers, the majority of systems exhibit no problems, even if they are subjected to interrupt latencies of tens of microseconds